Abstract: CNN ( Convolutional Neural Network) has large amount of computation, in order to achieve the purpose of fast data processing, hardware means are needed to accelerate. Based on the architecture characteristics of FPGA(Field Programmable Gate Array), a parallel computing acceleration strategy based on FPGA is proposed. The specific methods of this strategy include: reducing the data reading delay by reasonably distributing on-chip memory and off chip memory; accelerating the convolution operation by multi-channel parallel flow; reducing access delay by convolutional layer data sharing. PYNQ-Z2 development platform is used to accelerate the convolutional neural network YOLOv2 and achieve the detection and identification of the target object. The processing capacity of this design is 27.03 GOP / s, compared with CPU ( E5-2620v4 ), the processing capacity is 6. 57 times that of CPU and the power consumption is 3% of CPU.

Key words: convolutional neural network (CNN), field programmable gate array ( FPGA), target detection, hardware acceleration