Journal of Jilin University (Information Science Edition) ›› 2024, Vol. 42 ›› Issue (2): 226-231.

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Noise-Shaping SAR ADC Design of High Accuracy and Low Power Consumption

ZHAO Zhuang 1 , FU Yunhao 1 , GU Yanxue 1 , CHANG Yuchun 1,2 , YIN Jingzhi 1    

  1. 1. College of Electronic Science and Engineering, Jilin University, Changchun 130012, China; 2. College of Microelectronics, Dalian University of Technology, Dalian 116024, China
  • Received:2023-03-05 Online:2024-04-10 Published:2024-04-12

Abstract:  The design of the loop filter in noise-shaping SAR ADC(Successive Approximation Register Analogto Digital Converter) is the key to the effect of noise shaping and is also an important module to achieve high accuracy performance. Compared with the active lossless integral loop filter, the traditional passive lossy integral loop filter has the characteristics of low power consumption and simple circuit design, but its NTF(Noise Transfer Function) is smooth and the noise shaping effect is weak. To solve this problem, a passive lossless second-order integral loop filter is proposed, which retains the advantages of the passive lossy integral loop filter and has a good noise shaping effect. A hybrid architecture noise-shaping SAR ADC with a resolution of 16 bits and a sampling rate of 2 Ms/ s is also designed. The simulation results show that high SNDR( Signal to Noise and Distortion Ratio) (91. 1 dB), high accuracy ( 14. 84 bits), and low power consumption ( 285 uW) are achieved when the bandwidth is 125 kHz and the oversampling ratio is 8.

Key words: successive approximation register analog to digital converter(SAR ADC), noise-shaping SAR ADC; high accuracy, low power consumption

CLC Number: 

  • TN431. 1