片上多核处理器末级共享Cache可重用数据预测机制

›› 2012, Vol. ›› Issue (06): 1505-1509.

片上多核处理器末级共享Cache可重用数据预测机制

韩立敏, 高德远, 樊晓桠, 史莉雯, 安建峰

西北工业大学计算机学院, 西安 710129

收稿日期:2011-10-09 出版日期:2012-11-01
通讯作者: 安建峰(1977-),男,讲师,博士.研究方向:计算机系统结构.E-mail:anjf@nwpu.edu.cn E-mail:anjf@nwpu.edu.cn
基金资助:
国家自然科学基金项目(60736012,61003037,61173047);"863"国家高技术研究发展计划项目(2009AA01Z110);西北工业大学基础研究基金项目.

Reusable data predicting mechanism for shared last level Cache in chip multi-processor

HAN Li-min, GAO De-yuan, FAN Xiao-ya, SHI Li-wen, AN Jian-feng

School of Computer Science, Northwestern Polytechnical University, Xi'an 710129, China

Received:2011-10-09 Online:2012-11-01

摘要/Abstract

摘要： 为了减少片上多核处理器(Clip multi-processor,CMP)末级共享Cache中的干扰,根据应用程序的存储访问频率特性,提出了一种基于替换算法的可重用数据预测机制。当末级共享Cache的数据将被替换时,先检测此数据的历史访问信息,根据历史访问信息过滤出会被重复使用的数据,并将其保存在片上专用存储器中。仿真结果表明:本文的可重用数据预测机制将IPC(Instruction per clock)平均提高了2.9%,平均减少了应用程序中22.69%的有害替换,有效地减少了Cache抖动。

关键词: 计算机系统结构, 多核处理器, 冲突缺失, Cache抖动, 末级共享Cache

Abstract: To reduce interference of the shared LLC on a chip Multi-Processor (CMP) architecture, we propose a Replacement policy based Reusable Data Predicting mechanism (RRDP) to select possible reused data from replaced data according to the memory access frequency characteristics of application. When some data will be replaced in LLC Cache, we filter out predicted reusable data by checking their history reference information, and store them into a dedicated on-chip memory. Our simulation results show that the proposed mechanism increases the IPC of programs by 2.9% on average and reduces the harmful replacements by 22.69%, so it can effectively reduce Cache thrashing.

Key words: computer architecture, multi-core processor, contention miss, Cache thrashing, shared last level Cache

中图分类号:

TP302

韩立敏, 高德远, 樊晓桠, 史莉雯, 安建峰. 片上多核处理器末级共享Cache可重用数据预测机制[J]. , 2012, (06): 1505-1509.

HAN Li-min, GAO De-yuan, FAN Xiao-ya, SHI Li-wen, AN Jian-feng. Reusable data predicting mechanism for shared last level Cache in chip multi-processor[J]. , 2012, (06): 1505-1509.

参考文献

[1] Dybdahl H, Stenström P,Natvig L.An LRU-based replacement algorithm augmented with frequency of access in shared chip-multiprocessor Caches[C]//Proceedings of the 2006 Workshop on Memory Performance: Dealing with Applications,Systems and Architectures,New York,USA,2006:45-52.
[2] Kharbutli M,Yan S.Counter-based cache replacement and bypassing algorithms[J].IEEE Transaction on Computers,Washington D C,USA,2008,57(4):433-447.
[3] Chaudhuri M. Pseudo-LIFO: The foundation of a new family of replacement policies for last-level caches[C]//Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, New York, USA,2009: 401-412.
[4] Khan S M, Jiménez D A, Burger D, et al. Using dead blocks as a virtual victim cache[C]//Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, New York, USA, 2010: 489-500.
[5] 王震, 徐高潮. 基于IPC与公平性的共享Cache划分[J]. 吉林大学学报:理学版, 2011,49(4):740-744. Wang Zhen, Xu Gao-chao. Shared cache partitioning based on IPC and fairness[J]. Journal of Jilin University(Science Edition),2011,49(4):740-744.
[6] Jason Loew. M-sim:the multi-threaded simulator. version 3.0.http://www.cs.binghamton.edu/~msim/
[7] Zahran M, McKee S A. Global management of cache hierarchies[C]//The ACM International Conference on Computing Frontiers, Bertinoro, Italy, 2010:131-139.
[8] Zhou Yuan-yuan,Philbin J F,Li Kai.The multi-queue replacement algorithm for second level buffer caches[C]//In Proceedings of 2001 USENIX Annual Technical Conference,California C A,USA,2002:1-11.
[9] Xiang Ling-xiang, Chen Tian-zhou, Shi Qing-song, et al. Less reused filter: improving L2 cache performance via filtering less reused lines[C]//Proceedings of the 23rd International Conference on Supercomputing, New York, USA, 2009:68-79.
[10] Chandra D, Guo F, Kim S, et al. Predicting inter-thread cache contention on a chip multi-processor architecture[C]//Proceedings of the 11th International Symposium on High-Performance Computer Architecture, Washington D C, USA,2005: 1-12.
[11] Jouppi N P. Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers[C]//17th International Symposium on Computer Architecture, New York, USA, 1990:364-373.

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