吉林大学学报(信息科学版) ›› 2025, Vol. 43 ›› Issue (1): 26-33.

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基于 Coretx-M3 的图像处理 SoC 设计与实现

刘沂军张鹤龄梅海霞王丽杰   

  1. 吉林大学 电子科学与工程学院, 长春 130012
  • 收稿日期:2023-10-10 出版日期:2025-02-24 发布日期:2025-02-24
  • 通讯作者: 王丽杰(1979— ), 女, 吉林公主岭人, 吉林大学讲师, 主要从事集成电路、 纳米材料功能器件研究, (Tel)86-13756916792 (E-mail)wang_lij@ jlu. edu. cn。 E-mail:wang_lij@ jlu. edu. cn
  • 作者简介:刘沂军(2000— ), 男, 山东临沂人, 吉林大学本科生, 主要从事 SoC、 微纳电子学研究, (Tel)86-15893566685 (E-mail)19180326@ sjtu. edu. cn
  • 基金资助:

    吉林省自然科学基金资助项目(20230101038JC); 2023 年度吉林省职业教育与成人教育教学改革研究课题基金资助项目

Design and Implementation of Image Processing SoC Based on Coretx-M3

LIU Yijun, ZHANG Heling, MEI Haixia, WANG Lijie   

  1. College of Electronic Science and Engineering, Jilin University, Changchun 130012, China
  • Received:2023-10-10 Online:2025-02-24 Published:2025-02-24

摘要: 针对单一的嵌入式处理器很难高效地完成图像处理等巨量计算任务的问题基于 FPGA ( Field-Programmable Gate Array)和 Coretx-M3 处理器内核设计了一套具有图像处理功能的 SoC( System on Chip)。 硬件设计基于 Xilinx 公司的 Kintex-7 FPGA 和 Arm 公司提供的 Cortex-M3 内核, 在 FPGA 上实现处理器架构, 利用 IP(Internet Protocol)核与 Verilog 设计存储器、 总线系统和基本的外设, 并通过总线与处理器相连, 设计图像处理单元, 将常用的数字图像处理算法映射为硬件描述语言, 并设计总线接口与处理器相连, 为 SoC 提供图像处理能力。 软件设计基于 Keil MDK 工具和 C 语言, 为 SoC 的外设和图像处理单元编写驱动程序, 仿真了系统功能,同时以二值化算法为例将基于 Matlab 的数字图像处理与 SoC 中的图像处理单元进行充分的对比测试, 结果表明该图像处理 SoC 不但性能优良, 同时拥有FPGA 与 SoC 的全部优势。 笔者成功开发出了基于 FPGA 平台的具有图像处理功能的 SoC, 该系统在 Xilinx 公司的 Kintex-7 系列, 型号为 XC7K325TFFG676-2 的 FPGA 上进行了板级验证。 该设计体现出 FPGA 平台设计该系统的高度灵活性与高效性, 提供了单一嵌入式处理器很难高效完成图像处理等巨量计算任务弊端的一种解决方案。 该系统基于可重构平台设计, 可实现外设功能根据需求的定制化, 具有灵活度更高的优势。

关键词: 现场可编程门阵列, Cortex-M3 处理器, 片上系统, 硬件加速

Abstract:

A single embedded processor is difficult to efficiently complete the massive computing tasks such as image processing. Therefore, a set of SoC(System on Chip) with image processing function is designed based on FPGA(Field-Programmable Gate Array) and Coretx-M3 processor kernel. Based on Xilinx’s Kintex-7 FPGA and Arm’s Cortex-M3 kernel, the processor architecture is implemented on FPGA. The memory, bus system and basic peripherals are designed using IP(Internet Protocol) core and Verilog, and are connected to the processor through the bus. The image processing unit is designed, and the commonly used digital image processing

algorithm is mapped to the hardware description language. And the bus interface is designed to connect to the processor, providing the image processing capability for SoC. Based on Keil MDK tool and C language, the drivers for the peripheral and image processing unit of SoC are written, and the system function is simulated. And the digital image processing based on Matlab and the image processing unit in SoC are fully compared and tested by taking the binarization algorithm as an example. This image processing SoC has excellent performance and all the advantages of FPGA and SoC. The author has successfully developed a SoC with image processing function based on FPGA platform. The system is board-validated on Xilinx’s Kintex-7 family, model XC7K325TFFG676-2 FPGAs. This design reflects the high flexibility and efficiency of the system designed on FPGA platform, and provides a solution to solve the disadvantages of a single embedded processor that is difficult to efficiently complete the massive computing tasks such as image processing. The system is designed based on a reconfigurable platform, which can realize the customization of peripheral functions according to requirements, and has the advantage of higher flexibility.

Key words: field programmable gate array ( FPGA), Cortex-M3 processor, system on chip ( SoC), hardware acceleration 

中图分类号: 

  • TN914