吉林大学学报(信息科学版) ›› 2021, Vol. 39 ›› Issue (6): 630-636.

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基于AD9361的MIMO-OFDM同步定时接收系统

贺更新, 陈 莹   

  1. 中国电子科技集团公司 第 39 研究所, 西安 710065
  • 收稿日期:2020-09-16 出版日期:2021-12-01 发布日期:2021-12-01
  • 作者简介:贺更新(1972— ), 男, 辽宁锦州人, 中国电科39所高级工程师,主要从事天线技术及移动通信信号处理研究,(Tel)86-13519199263(E-mail)13519199263@ 139. com。
  • 基金资助:
    陕西省自然科学基金资助项目(SKJ(2019)2210-04)

Design and Performance Evaluation of MIMO-OFDM Synchronization Timing Receiving System Based on AD9361

HE Gengxin, CHEN Ying   

  1. 39th Research Institute, China Electronics Technology Group Corporation, Xian 710065, China
  • Received:2020-09-16 Online:2021-12-01 Published:2021-12-01

摘要: 随着第五代通信技术的飞速发展, 通信数据量快速增长, 为解决通信效率低下的问题, 提出一种更高 数据传输速率及频率利用率的数据接收系统。 通过分析 AD9361 技术在无线通信系统中的应用, 设计了基于 AD9361 的多输入多输出(MIMO: Multiple-Input Multiple-Output) 正交频分复用(OFDM: Orthogonal Frequency Division Multiplexing)同步定时接收系统。 该系统不仅具有频谱利用率高、 解调方式灵活以及通信速度快等优 点, 同时还在 5G 建设中具有重要意义。 测试结果表明, 基于 AD9361 的 MIMO-OFDM 定时收发同步系统具有 较高的收敛性, 该系统的现场可编程门阵列(FPGA: Field-Programmable Gate Array)资源占用情况整体良好, 且 采集数据较为稳定。 同时, 在数据定时接收同步过程中, 该系统可有效避免误码率影响, 不会发生符号间干扰 (ISI: Inter Symbol Interference)与信道间干扰(ICI: Inter Channel Interference), 并且定时接收同步系统符合传输 信道标准, 具有较高的无线通信稳定性。

关键词: AD9361 收发器 , 正交频分复用技术 , 多入多出技术 , 现场可编程逻辑门阵列 , 无线通信

Abstract: With the rapid development of the fifth-generation communication technology, the amount of communication data has grown rapidly. In order to solve the problem of low communication efficiency, a data receiving system with higher data transmission rate and higher frequency efficiency is proposed. By analyzing the application of AD9361 technology in wireless communication systems, a MIMO ( Multiple-Input Multiple-Output)、 OFDM (Orthogonal Frequency Division Multiplexing) synchronous timing receiving system based on AD9361 is designed. This system has the advantages of high spectrum utilization, flexible demodulation mode and fast communication speed having important significance in 5G construction. The test result shows that MIMO- OFDM synchronous timing receiving system based on AD9361 has high convergence and the FPGA ( Field- Programmable Gate Array) resource occupancy of the system is generally good, and the collected data is relatively stable. In addition, during the synchronization of data receiving the system can effectively avoid the influence of bit error rate, without ISI(Inter-Symbol Interference) and ICI(Inter-Channel Interference), and the data receiving system meets the transmission channel standard which has high wireless communication stability.

Key words: AD9361 transceiver, orthogonal frequency division multiplexing, multiple-input multiple-output; field-programmable gate array, wireless communication

中图分类号: 

  • TN92