Abstract:

In order to realize parallel multi-channel high-speed data acquisition and storage, a method which is based on FPGA(Field Programmable Gate Array) and Nios II is proposed. This system can realize the parallel control of multi-channel ADCs(Analog-to-Digital Converter), to achieve parallel high-speed acquisition of multi-channel signal. The data acquired and the FPGA configuration data can share the configuration memory, which can save the extra storage devices, and reduce the system cost. In the experiment, use EP2C35F672C8 as core, AD7980 as ADC, EPCS64 as the storage medium, to achieve entirely parallel acquisition for 15-channel analog signal. The adoption of soft core technology makes the system more flexible and extensible. The results show that it provides new ideas to projects which requires low cost, frequent system upgrade.

Key words: Nios IIcontroller, field programmable gate array(FPGA), multi-channel data acquisition, high speed, parallel, erasable programmable configurable serial(EPCS)