Abstract: In order to save the time and cost of FPGA ( Field Programmable Gate Array) upgrade，we design a
FPGA program method that uses UART ( Universal Asynchronous Receiver /Transmitter) to replace the traditional
JTAG( Joint Test Action Group) method． The design is mainly composed of Xilinx FPGA，UART chip，Flash
chip and serial port connection line． By integrating the MIcroBlaze processor，ICAP ( Internal Configuration
Access Port) ，IP( Intellectual Property) core and UART control module into the FPGA chip，the system on the
programmable chip is set up． At the same time，MultiBoot double mirror technology is adopted to achieve that
even if the update fails，the backup image can still be loaded to ensure the normal work of the system，so as to
ensure the stability of the design． Experimental results show that this design can replace the traditional FPGA
upgrade method and save the upgrade time and cost． This design has the advantages of high update efficiency，
low maintenance cost，high stability，and can be used for FPGA remote update．

Key words: field programmable gate array ( FPGA) , universal asynchronous receiver /transmitter ( UART) ,
MultiBoot, programmable system-on-chip( PSOC)