Abstract:

Boolean difference calculation have many  Exclusive OR operation. To resolve this problem and to meet the requirement of high speed data processing, using FPGA（Field Programmable Gate Array） to generate the test set has been proposed and the whole process of fault diagnosis for a certain type of radar circuit based on this method is explained. The simulation results show that the time needed for generating the whole test set is 43 μs when the clock pulse frequency is 48 MHz and the numbers of circuit input are eight. When the input is multiple, it can save more time,it is a new way for diagnosing the fault of this radar rapidly. 

Key words: boolean difference calculus, test set, field programmable gate array（FPGA）, fault diagnosis