Abstract:

In order to reduce chip load fluctuations and power supply noise on the system output,thereby improving system performance.A high performance off-chip capacitor-free LDO (Low Drop-Out) linear voltage regulator is designed with 0.35 μm CMOS（Complementary Metal Oxide Semiconductor) technology and Cadence,the circuit proposes the enhancing structure of load transient response and power supply interference rejection.The experimental results show that the circuit has a good line regulation and load regulation,the parameters meet standards,when the input voltage from 3 V to 5 V,the system can stabilize the output voltage at 2.8 V,the off-chip capacitor-free LDO power supply interference rejection capacity can be achieved about -46 dB at 1 MHz,the output voltage overshoot is less than 55 mV.

Key words: low drop-out（LDO） linear voltage regulator, load transient response, power supply rejection ratio