Journal of Jilin University Science Edition

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Design and Implementation of Variable PointsFFT Processor Based on FPGA Architecture

CAI Hua, CHEN Guangqiu, LIU Guangwen, GENG Zhenye, DU Zhaosheng   

  1. School of Electronic and Information Engineering, Changchun University of Science and Technology, Changchun 130022, China
  • Received:2017-02-15 Online:2018-01-26 Published:2018-01-24
  • Contact: CHEN Guangqiu E-mail:guangqiu_chen@126.com

Abstract: The complexity of radix4 algorithm was reduced by optimizing the traditional radix-4 fast Fourier transform (FFT) algorithm, which retained the butterfly structure of radix-2 algorithm. The optimized mixed radix-4/2 and pipeline radix-22 singlepath delay feedback (R22SDF) structure were adopted to design the variable points FFT processor, and the output results were verified by the function and signal simulation. The results show that the FFT processor is excellent in validity and efficiency.

Key words: radix-22 singlepath delay feedback (R22SDF), butterfly operation, orthogonal frequency division multiple access , pipeline, (OFDMA), fast Fourier transform (FFT)

CLC Number: 

  • TN47