吉林大学学报(信息科学版) ›› 2020, Vol. 38 ›› Issue (3): 286-290.

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利用UART 对FPGA 进行升级的方法

常亮1,毕今朝2,蒋佳奇2   

  1. 1. 中国电子科技集团公司第三十二研究所,上海201808; 2. 吉林大学电子科学与工程学院,长春130012
  • 收稿日期:2019-12-26 出版日期:2020-05-24 发布日期:2020-06-24
  • 作者简介:常亮( 1983— ) ,男,上海人,中国电子科技集团公司工程师,主要从事计算机嵌入式领域研究,( Tel) 86-13482698111( E-mail) changliang@ ecict. com. cn。
  • 基金资助:
    国家自然科学基金资助项目( 61674068; 61734001)

Method to Upgrade FPGA with UART

CHANG Liang1,BI Jinzhao2,JIANG Jiaqi2   

  1. 1. The Thirty Second Research Institute,China Electronics Technology Group Corporation,Shanghai 201808,China;
    2. College of Electronic Science and Engineering,Jilin University,Changchun 130012,China
  • Received:2019-12-26 Online:2020-05-24 Published:2020-06-24

摘要: 为节省FPGA( Field Programmable Gate Array) 升级工作的时间和成本,设计了一种利用UART( Universal
Asynchronous Receiver /Transmitter) 替代传统JTAG( Joint Test Action Group) 方式升级的FPGA 程序方法,该设计
主要由Xilinx FPGA、UART 芯片、Flash 芯片和串口连接线等组成。通过将MicroBlaze 处理器、ICAP( Internal
Configuration Access Port) 、IP( Intellectual Property) 核及UART 控制模块等集成在FPGA 芯片中实现可编程片上
系统的搭建。同时采用MultiBoot 双镜像技术,实现了即使在更新失败的情况下,依旧可加载备份镜像保证系
统正常工作,以此保证设计的稳定性。实验结果表明,此设计可以替代传统FPGA 升级方法,节省升级工作的
时间和成本。本设计具有更新效率高、维护成本低、稳定性高等优点,且可用于FPGA 远程更新。

关键词: FPGA 芯片, UART 芯片, MultiBoot 双镜像, 可编程片上系统

Abstract: In order to save the time and cost of FPGA ( Field Programmable Gate Array) upgrade,we design a
FPGA program method that uses UART ( Universal Asynchronous Receiver /Transmitter) to replace the traditional
JTAG( Joint Test Action Group) method. The design is mainly composed of Xilinx FPGA,UART chip,Flash
chip and serial port connection line. By integrating the MIcroBlaze processor,ICAP ( Internal Configuration
Access Port) ,IP( Intellectual Property) core and UART control module into the FPGA chip,the system on the
programmable chip is set up. At the same time,MultiBoot double mirror technology is adopted to achieve that
even if the update fails,the backup image can still be loaded to ensure the normal work of the system,so as to
ensure the stability of the design. Experimental results show that this design can replace the traditional FPGA
upgrade method and save the upgrade time and cost. This design has the advantages of high update efficiency,
low maintenance cost,high stability,and can be used for FPGA remote update.

Key words: field programmable gate array ( FPGA) , universal asynchronous receiver /transmitter ( UART) ,
MultiBoot,
programmable system-on-chip( PSOC)

中图分类号: 

  • TN911