基于0.35 μm CMOS的高性能LDO稳压器设计

J4 ›› 2012, Vol. 30 ›› Issue (5): 470-.

基于0.35 μm CMOS的高性能LDO稳压器设计

刘阳^a,b,李强^a,b,余昭杰^a,b,戚忠雪^a,b,殷景志^a,b

吉林大学 a.电子科学与工程学院;b.集成光电子国家重点联合实验,长春 130012

出版日期:2012-09-28 发布日期:2012-11-01
作者简介:刘阳（1986—）|男|长春人|吉林大学硕士研究生,主要从事模拟集成电路研究|（Tel）86-15104422169（E-mail）jd.dz.ly@163.com；通讯作者：殷景志(1960—)|女|哈尔滨人|吉林大学教授|博士生导师|主要从事半导体光电器件研究|（Tel）86-13159750298（E-mail）yjz886666@yahoo.com.cn。
基金资助:
国家自然科学基金资助项目（61076046）

High Performance Low Drop-Out Linear Voltage Regulator with 0.35 μm CMOS Technology

LIU Yang^a,b,LI Qiang^a,b|YU Zhao-jie^a,b,QI Zhong-xue^a,b,YIN Jing-zhi^a,b

a.College of Electronic Science and Engineering;b.State Key Laboratory on Integrated Photoelectronics,Jilin University,Changchun 130012,China

Online:2012-09-28 Published:2012-11-01

摘要/Abstract

摘要：

为降低芯片负载波动及电源干扰对系统输出的影响，以提高芯片性能,基于0.35 μm CMOS(Complementary Metal Oxide Semiconductor)工艺，采用Cadence设计了高性能的无片外电容低压差(LDO:Low Drop-Out) 线性稳压器集成电路,给出了负载瞬态响应增强网络以及电源干扰抑制增强网络的设计方案并进行了仿真实验。实验结果表明，电路具有良好的线性调整率和负载调整率，各项性能指标均符合行业标准，系统在3～5 V的输入电压范围内，稳定的输出电压为2.8 V，电源抑制比在高频1 MHz时达到-46 dB，负载变化引起的输出电压过冲小于55 mV。

关键词: 低压差线性稳压器, 负载瞬态响应, 电源抑制比

Abstract:

In order to reduce chip load fluctuations and power supply noise on the system output,thereby improving system performance.A high performance off-chip capacitor-free LDO (Low Drop-Out) linear voltage regulator is designed with 0.35 μm CMOS（Complementary Metal Oxide Semiconductor) technology and Cadence,the circuit proposes the enhancing structure of load transient response and power supply interference rejection.The experimental results show that the circuit has a good line regulation and load regulation,the parameters meet standards,when the input voltage from 3 V to 5 V,the system can stabilize the output voltage at 2.8 V,the off-chip capacitor-free LDO power supply interference rejection capacity can be achieved about -46 dB at 1 MHz,the output voltage overshoot is less than 55 mV.

Key words: low drop-out（LDO） linear voltage regulator, load transient response, power supply rejection ratio

中图分类号:

TN431.1

刘阳,李强,余昭杰,戚忠雪,殷景志. 基于0.35 μm CMOS的高性能LDO稳压器设计[J]. J4, 2012, 30(5): 470-.

LIU Yang,LI Qiang|YU Zhao-jie,QI Zhong-xue,YIN Jing-zhi. High Performance Low Drop-Out Linear Voltage Regulator with 0.35 μm CMOS Technology[J]. J4, 2012, 30(5): 470-.

[1]	李强, 刘阳, 汤欲涛, 曹令今, 刘云峰, 常玉春, 殷景志. 红外探测器的读出电路设计[J]. J4, 2013, 31(2): 113-117.
[2]	丁玲, 余昭杰, 李靖, 周泉, 杜国同, 常玉春. 基于0.5 μm CMOS工艺的BOOST变换器设计[J]. J4, 2012, 30(1): 1-4.