吉林大学学报(工学版) ›› 2015, Vol. 45 ›› Issue (5): 1624-1630.doi: 10.13229/j.cnki.jdxbgxb201505035

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片上网络的访存延迟均衡性

李洋1, 2, 陈小文3, 赵晓晖1, 杨勇2   

  1. 1.吉林大学 通信工程学院,长春130022;
    2.长春理工大学 电子信息工程学院,长春130022;
    3.国防科学技术大学 计算机学院,长沙 410073
  • 收稿日期:2015-02-14 出版日期:2015-09-01 发布日期:2015-09-01
  • 通讯作者: 赵晓晖(1957-),男,教授,博士生导师.研究方向:信号处理理论在通信中的应用.E-mail:xhzhao@jlu.edu.cn
  • 作者简介:李洋(1978-）,女,博士研究生.研究方向:无线网络通信理论和技术.E-mail:lyang@cust.edu.cn
  • 基金资助:
    国家自然科学基金项目(61171079); 湖南省自然科学基金项目(2015JJ3017); 高等学校博士学科点专项科研基金项目(20134307120034)

Latency equalization of memory access in network-chips

LI Yang1, 2, CHEN Xiao-wen3, ZHAO Xiao-hui1, YANG Yong2   

  1. 1.College of Communication Engineering, Jilin University, Changchun 130022,China;
    2.School of Electronics and Information Engineering, Changchun University of Science and Technology, Changchun 130022, China;
    3.College of Computer, National University of Defense Technology, Changsha 410073, China
  • Received:2015-02-14 Online:2015-09-01 Published:2015-09-01

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摘要： 对片上网络访存延迟均衡性展开了研究,提出基于总延迟预测的访存报文仲裁技术。首先,依据访存报文后续路径的拥塞信息预测访存报文未来等待延迟,并计算出总延迟。其次,基于预测的总延迟对竞争同一链路的访存报文进行仲裁。在Mesh片上网络路由器中,对该技术进行了设计和实现。实验结果表明:在不同的网络规模和报文注入率下,与经典Round-Robin仲裁机制相比,本文技术能够极大减少片上访存的最大延迟和延迟标准差,减少平均延迟,证明能够获得更佳的访存延迟均衡性。

关键词: 通信技术, 片上网络, 访存延迟, 众核架构, 仲裁技术, 均衡性

Abstract: A novel arbitration technique for memory access packets is proposed, which is based on the round-trip latency prediction. First, the congestion information in the subsequent path of memory access packets is used to predict the waiting latencies of the memory access packets in the future, and then the round-trip latencies are calculated. Second, the predicted round-trip latencies are used to decide the arbitration for the memory access packets contending for the same link. The proposed technique is designed and implemented in the routers of mesh-based NoCs. Experimental results show that, under different network sizes and packet injection rates, compared with the classic Round-Robin arbitration mechanism, the proposed technique can greatly reduce the maximum latency, the average latency and the latency standard deviation of on-chip memory accesses, and it is proved to achieve better latency equalization of memory access.

Key words: communication technology, network-on-chip (NOC), memory access latency, many-core architectures, arbitration technique, equalization

中图分类号: 

  • TN91
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