关键词: 计算机应用, 低功耗, 数据流综合, 霍恩形式, 高级综合, 布图规划

Abstract:

 A high level data flow synthesis method with low power based on Horner form is presented. Using Horner form the function description of the circuit is transformed to get the final polynomial form. The dataflow is scheduled, allocated and bound based on Horner form. During the process of synthesis the influences of binding and layout on the length of interconnect wire are considered, and the power consumption is reduced by shortening the wire length. By this method better circuit design can be obtained in limited area to satisfy the performance requirement. Experiment results demonstrate the efficiency of this synthesis method that the power consumption is saved by about 20% compared with existing synthesis method.

Key words: computer application, low power, data flow synthesis, Horner form, high level synthesis, floorplanning