吉林大学学报(工学版) ›› 2017, Vol. 47 ›› Issue (5): 1634-1643.doi: 10.13229/j.cnki.jdxbgxb201705041

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Ultra-high speed CameraLink image transmission based on FPGA

SUI Yan-lin1, 2, HE Bin1, ZHANG Li-guo1, WANG Wen-hua1, CHEN Jia-nan3   

  1. 1.Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Science, Changchun 130033, China;
    2.University of Chinese Academy of Science, Beijing 100039, China;
    3.School of Micro-Electronics and Solid-state Electronics, University of Electroncic Science and Technology of China, Chengdu 610054,China
  • Received:2016-06-20 Online:2017-09-20 Published:2017-09-20

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Abstract: Based on Field Programmable Gate Array (FPGA), two sets of CameraLink interface transfer hardware platform are designed to compare serial-parallel converter chip and CameraLink interface based on FPGA). A new method, in which on-chip debugging tool Chipscope is combined with synchronized generation module, is proposed to detect error data accurately. The results show that CameraLink interface based on FPGA uses fewer pins with higher speed transmission rates. Single port supports a maximum transfer rate of 4.31 Gbit/s when the pixel clock is 154 MHz. The CameraLink data output can drive 6 m CameraLink transmission line, with no bit error appears for long hours, and it can be used in a variety of different systems based on CameraLink interface.

Key words: information processing technology, CameraLink, field programmable gate array(FPGA), SERial and DESserial(SERDES), chipscope

CLC Number: 

  • TN911
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